Log-Based Architectures

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The Log-Based Architectures (LBA) project focuses on developing extensions for many-core processors that enable efficient logging and extraction of run time execution events and demonstrating the benefits of such extensions for performance, debugging, security, and recovery.

An early application of this technology is the acceleration of dynamic correctness-checking tools (also known as "lifeguards" in this context). Software lifeguards have been used only during the debugging phase of the software development cycle because of their high runtime overhead (slowing down main applications by a factor of 10-100 times). However, these tools will be of great value for programs deployed in the field.

One of the goals of the LBA project is to reduce the overhead of lifeguards sufficiently to make feasible the inclusion of lifeguards in the standard runtime of deployed systems. To this end, the proposed LBA extensions accelerate the performance of lifeguard tools by providing more efficient access to interesting events for the program-under-test. The perceived runtime overhead can be reduced further in multicore applications by leveraging on-die cores that would otherwise be idle for the execution of the lifeguard.

Researchers

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• Michael Kozuch (co-PI)
  
• Phillip B. Gibbons (co-PI)
  
• Shimin Chen
  
• Todd Mowry
  

Collaborators

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• Babak Falsafi (EPFL&CMU)
• Vijaya Ramachandran (U.T. Austin)

Students

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• Michelle Goodstein (CMU)
• Olatunji Ruwase (CMU)
• Theodoros Strigkos (CMU)
• Evangelos Vlachos (CMU)

Previous Contributors

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• Anastassia Ailamaki (EPFL&CMU)
• Limor Fix (Intel Labs)
  
• Greg Ganger (CMU)
• Bin Lin (Northwestern)
• Michael Ryan (Intel Labs)
  
• Radu Teodorescu (UIUC)

Publications

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• Shimin Chen, Michael Kozuch, Theodoros Strigkos, Babak Falsafi, Phillip B. Gibbons, Todd C. Mowry, Vijaya Ramachandran, Olatunji Ruwase, Michael Ryan, Evangelos Vlachos. "Flexible Hardware Acceleration for Instruction-Grain Lifeguards"(pdf on ieee site). IEEE Micro, Jan/Feb 2009 Special Issue: Micro's Top Picks in Computer Architecture Conferences (IEEE Micro Top Picks).
• Olatunji Ruwase, Phillip B. Gibbons, Todd C. Mowry, Vijaya Ramachandran, Shimin Chen, Michael Kozuch, Michael Ryan. "Parallelizing Dynamic Information Flow Tracking Lifeguards"(pdf). In proceedings of the 20th ACM Symposium on Parallelism in Algorithms and Architectures (SPAA'08) (slides).
  
• Shimin Chen, Michael Kozuch, Theodoros Strigkos, Babak Falsafi, Phillip B. Gibbons, Todd C. Mowry, Vijaya Ramachandran, Olatunji Ruwase, Michael Ryan, Evangelos Vlachos. "Flexible Hardware Acceleration for Instruction-Grain Program Monitoring"(pdf). In proceedings of the 35th International Symposium on Computer Architecture (ISCA'08) (slides).
  
• Shimin Chen, Babak Falsafi, Phillip B. Gibbons, Michael Kozuch, Todd C. Mowry, Radu Teodorescu, Anastassia Ailamaki, Limor Fix, Gregory R. Ganger, Bin Lin, Steven W. Schlosser. "Log-Based Architectures for General-Purpose Monitoring of Deployed Code" (pdf).  In proceedings of Workshop on Architectural and System Support for Improving Software Dependability (ASID) held with ASPLOS, 2006.